24Cxx I2C EEPROM: addressing, page writes and safe reading
How 24C01…24C512 serial EEPROMs work: device address bits, one- vs two-byte memory addresses, page size, write-cycle time, ACK polling and bench-programming tips.
The 24Cxx family of I2C EEPROMs stores settings, calibration data and IDs everywhere: monitor and TV mainboards, car dashboards, industrial controllers, and countless microcontroller projects. In repair you'll often read, back up or rewrite one; in design you'll use one when the microcontroller's own EEPROM isn't enough.
Pinout (DIP-8 / SOIC-8)
| Pin | Name | Notes |
|---|---|---|
| 1, 2, 3 | A0, A1, A2 | Address select; tie to GND or VCC — don't leave floating |
| 4 | GND | |
| 5 | SDA | Data, open-drain — needs a pull-up |
| 6 | SCL | Clock |
| 7 | WP | Write protect: GND = writable, VCC = read-only |
| 8 | VCC | 1.7–5.5 V depending on the variant |
Device address
The 7-bit I2C address is 1010 A2 A1 A0 — 0x50 to 0x57 — followed by the read/write bit. That lets up to eight chips share one bus. The exception is the small parts: in the 24C04, 24C08 and 24C16, some of the A-bits are used as extra memory-address bits (“block select”), so fewer chips fit on a bus and one 24C16 answers on all eight addresses.
Sizes, address bytes and page sizes
| Part | Size | Memory address | Page size |
|---|---|---|---|
| 24C01 / 24C02 | 128 / 256 bytes | 1 byte | 8 bytes (16 on some) |
| 24C04 / 24C08 / 24C16 | 512 B / 1 KB / 2 KB | 1 byte + block bits in the device address | 16 bytes |
| 24C32 / 24C64 | 4 / 8 KB | 2 bytes | 32 bytes |
| 24C128 / 24C256 | 16 / 32 KB | 2 bytes | 64 bytes |
| 24C512 | 64 KB | 2 bytes | 128 bytes |
The page size differs between manufacturers for the same part number — always check the datasheet of the chip that's actually on the board.
Writing
- START, device address + W, the memory address (one or two bytes), then up to one page of data bytes, then STOP.
- The chip now programs internally for up to 5 ms (10 ms on some older parts) and ignores the bus.
- Instead of a fixed delay, use ACK polling: keep sending START + device address; the chip stays silent (NACK) while busy and acknowledges when it's done.
The classic bug: a write that crosses a page boundary doesn't continue into the next page — the address wraps to the start of the same page and overwrites it. Split writes at page boundaries.
Reading
A random read is a “dummy write” of just the memory address, then a repeated START with the device address + R. After that the chip streams bytes as long as the master keeps acknowledging — a sequential read can run through the whole memory, wrapping at the end.
Hardware tips
- Pull-ups of 4.7 kΩ suit 100 kHz; use around 2.2 kΩ for 400 kHz or long wiring.
- Tie WP to GND while writing, to VCC to protect data in the field.
- Reading a chip in circuit with a USB programmer (a CH341A or similar) often works, but other devices on the same bus can interfere. If readings differ between attempts, desolder the chip or isolate its VCC.
- Before changing anything, read twice, compare, and keep the backup. Mismatched reads mean a bad connection — writing in that state can brick the device.
Keep reading
Torry's Delphi Editor & curator
Hi, I'm Torry's Delphi. For more than ten years I've been writing software that collects and organises data — scrapers, catalogues, automation pipelines. Repair documentation turned out to be the perfect mess to clean up.
The files listed here were collected by the community in the Telegram channel @schematicslaptop, plus a Google Drive archive. I wrote a parser that reads every file name, recognises the brand, the ODM manufacturer (Compal, Quanta, Wistron…) and the board number, and turns it into pages you can search and browse.
Next to the catalogue I keep a small set of practical notes on electronics and PCB work — KiCad libraries, moving designs from Eagle, making prototype boards at home, LCDs and EEPROMs. If something is sorted wrong or a note is unclear, write to me and I'll fix it.